Book Description
Advances in semiconductor technology continue to increase the power and complexity of digital systems. To design such systems requires a strong knowledge of Application Specific Integrated Circuits (ASICs) and Field Programmable Gate Arrays (FPGAs), as well as the CAD tools required. Hardware Description Language (HDL) is an essential CAD tool that offers designers an efficient way for implementing and synthesizing the design on a chip. HDL Programming Fundamentals: VHDL and Verilog teaches students the essentials of HDL and the functionality of the digital components of a system. Unlike other texts, this book covers both IEEE standardized HDL languages: VHDL and Verilog. Both of these languages are widely used in industry and academia and have similar logic, but are different in style and syntax. By learning both languages students will be able to adapt to either one, or implement mixed language environments, which are gaining momentum as they combine the best features of the two languages in the same project. The text starts with the basic concepts of HDL, and covers the key topics such as data flow modeling, behavioral modeling, gate-level modeling, and advanced programming. Several comprehensive projects are included to show HDL in practical application, including examples of digital logic design, computer architecture, modern bioengineering, and simulation. ... Read more

Customer Reviews (5)

good bilingual introduction
Since this is one of the very few bilingual HDL textbooks, I have adopted it for my graduate-level introductory HDL-based design class. The author has been extremely cordial and helpful in handling my questions and comments via email, and I really like the book's extensive use of examples. My biggest gripes are the failure to embrace several Verilog 2001 constructs and the lack of test bench discussion. (I always start my class with a simple test bench example, to show the students how to get up-and-running with HDLs. They are then strongly encouraged to test all of their homework or term project designs with extensive test benches.) I need to supplement the book's discussions of logic synthesis and design verification, but it is a readable, accessible text for the novice or for anyone who knows one HDL and wishes to learn the rudiments of the other one.

Good reference for translating vhdl to verilog or vice versa.
I expect that this is the only book in print with vhdl-93 and verilog-95 examples side by side. For this reason it is a good reference for anyone knowing vhdl or verilog and wishing to quickly learn the other language for synthesis. Appendix B is a good cross reference for the two description languages.

This book does not cover HDL simulation and there are no testbench examples. The synthesis coverage of both languages is shallow. However for a designer who already knows one language and needs to learn the other, this book is an good value. I would also suggest that the word "Programming" be stricken from the title in the next edition, because this is not what hardware description is about.

Doesn't go far enough in depth, not organized well
I bought this book to learn verilog, pretty much because it had decent reviews and it's fairly cheap compared to other Verilog books. Well, you get what you pay for. Although I admire the author's attempts to try and cover both HDL languages, I had 2 major problems with the book:

1. It doesn't go in depth enough - This book would have been fine totally dedicated to either Verilog or VHDL, but it tries to cover both and doesn't cover the advanced details a professional or advanced grad student would need. It is a good primer for undergrads at best.

2. Minor flaw, but I didn't like how the book is organized. Like I said in point #1, if the book was either Verilog or VHDL it may have been sufficient. The author organizes the book so that a topic is covered for Verilog, then VHDL...then the next topic is covered in Verilog and then VHDL. I would have preferred if the first half of the book covered verilog, then the second half covered VHDL. If somebody is trying to learn Verilog like myself, I don't have to read a chapter, skip the next chapter, then read the next chapter...and so on and so forth.

The master teacher of HDL fundamentals
Nazeih M. Botros' HDL PROGRAMMING FUNDAMENTALS: VHDL AND VERILOG includes a cd of code for all the full programs from the book plus detailed in-depth descriptions of ASIC and FPGAs, as well as an overview of CAD tools. HDL is a CAD tool which offers designers a more efficient way for synthesizing chip designs, and this book is the master teacher of HDL fundamentals, covering both IEEE standardized languages VHDL and Verilog. Highly recommended for advanced students.

Automating Integrated Circuit Design
The design of semiconductors has become highly automated as the devices have gotten so complex that designing them by manual means is all but impossible. To assist in the design, the Hardware Definition Language (HDL)and the Very High-Speed Integrated Circuit (VHSIC) Hardware Definition Language (VHDL) were developed. They have become critical tools that the circuit designer must know and understand.

This book is intended to give the undergraduate student a solid background in the use of the software and it's place in the design phase for integrated circuits. It is suitable for any hardware oriented student in electrical engineering, computer engineering, or computer science where an emphasis on integrated circuit design is present. The book presumes no particular background, but some understanding of basic logic and modern algebra will be a help.

A CD included with the book that contains all the examples, code samples and figures. ... Read more

Book Description
The Verilog PLI Handbook: A User's Guide and ComprehensiveReference on the Verilog Programming Language Interface isdesigned to serve two specific needs:

• A tutorialon how to write PLI applications
• A reference book on the IEEE1364-1998 Verilog PLI standard.

Customer Reviews (3)

The right tool for the job.
This book is a must have, if you are writing PLI applications for any Verilog simulator. If you don't need to do that, then, well the book isn't for you.If you do, the price is very cheap, considering the time savingsyou will realize.

Clear explanations with good examples.
Very good coverage of a difficult topic.Well written and easy to understand.A must if you are doing PLI work!

Excellent descriptions and examples of Verilog PLI
This book brings clarity to the Verilog Programming Language Interface. The descriptions and examples shed new light on aspects of the PLI that had previously been murky.Stuart Sutherland has produced the definitive guideto all versions of the PLI.I highly recommend this book to all Verilogusers who want to learn the PLI.The first time you use an example fromthe book, you will save hours compared to flipping through the IEEE manual. ... Read more

Book Description
With this book, you can:

- Start writing synthesizable Verilog models quickly.

- See what constructs are supported for synthesis and how these map to hardware so that you can get the desired logic.

- Learn techniques to help avoid having functional mismatches.

- Immediately start using many of the models for commonly used hardware elements described for your own use or modify these for your own application. ... Read more

Customer Reviews (6)

Useful for Learning Verilog which can be Synthesized
I used the book with the XILINX version of ModelSim, a Verilog Simulator.
My goal was to be able to generate synthsizable Verilog without a lot of experimentation.
The style is by example. It is a good source of useful Verilog coding.
It is assumed you have some background in Verilog.
The book could use some tables on logic operators.
I think people who want to learn and use Verilog for synthesizable designs would benifit from having this book close at hand. It could be a really useful text for college students.

This is a very good (and short) book on Verilog synthesis
The author does a very good job of covering synthesizable Verilog.The numerous examples provide the reader with solid Verilog coding style guidelines.In addition, the author's discussion of blocking and non-blocking assignment statements for synthesizing combinational and sequential logic is very clear and concise.The only complaint I have about the book is its weak treatment of parameterizable design for synthesis. Despite the drawback, this is a very good reference and coding style guide for writing synthesizable Verilog.

A Synthesis Book...At Last
I write this review for two books: Verilog HDL Primer and Verilog HDL "SYNTEHSIS" Primer. Both books are primers, but serve the title very well. The books are straight to the point and do not "ramble" with grammar (ie. he tells you what it is you need to know and does not attempt to distract you). This is the book I use when I look for Verilog contructs for synthesis. The examples resemble closer to real world application including techniques in modeling digital systems. No comparison to the "other" Verilog text (Palnitkar). These two books complement one another. Another good verilog book is by Sternheim, but it is relatively expensive and hard to get.

Best Verilog Synthsis book
This is the best book about the Verilog Synthesis.The book is very practical, and I immediately applied many examples into my work....

Great Verilog info for Synthesis
This book is an excellant reference for anyone writing Verilog forsynthesis. I found the examples useful and complete. ... Read more

Book Description
The IEEE 1364-2001 standard, nicknamed `Verilog-2001', is thefirst major update to the Verilog language since its inception in1984. This book presents 45 significant enhancements contained inVerilog-2001 standard. A few of the new features described in thisbook are:

• ANSI C style port declarations formodules, primitives, tasks and functions;
• Automatic tasks andfunctions (re-entrant tasks and recursive functions);
• Multidimensional arrays of any data type, plus array bit and partselects;
• Signed arithmetic extensions, including signed datatypes and sign casting;
• Enhanced file I/O capabilities, such as$fscanf, $fread and much more;
• Enhanced deepsubmicron timing accuracy and glitch detection;
• Generate blocksfor creating multiple instances of modules and procedures;
• Configurations for true source file management within the Veriloglanguage.

Customer Reviews (1)

Excellent overview and explanation of Verilog 2001
This book provides an excellent overview an explanation of the new Verilog 2001 features, the rationale for each new feature, and examples. ... Read more

Book Description
Thomas and Moorby's The Verilog TM Hardware Description Language has become the standard reference text for Verilog.The newly updated introduction presents the language through examples illustrating the important styles of representation including: structural models, behavioral models of combinational and sequential circuits for logic synthesis, FSM-datapath models, and cycle-accurate descriptions. A new chapter on behavioral synthesis presents the use of cycle-accurate descriptions with these tools.The Verilog TM Hardware Description Language, Fourth Edition is a valuable resource for engineers and students interested in describing, simulating, and synthesizing digital systems.The book is ready for use in university courses. The order of coverage of representation styles matches typical introductory courses (structural, synthesizable, FSM-datapath, cycle-accurate). An appendix with a tutorial workbook style is keyed into the introduction. For architecture courses, modeling of simple pipelined processors is presented.CD-ROM included!The book includes a CD-ROM containing the VeriwellTM Verilog simulator, the Synplicity TM Synplify TM FPGA synthesis software, examples from the book in text and PDF format, and lecture slides in PDF format. Usage of the synthesis tool is time-limited; directions for obtaining an extended license are provided. The simulator and synthesis tools are available for several platforms. ... Read more

Customer Reviews (11)

Very good
'The Verilog Hardware Description Language' is a very good tutorial and reference for intermediate designers.
I used this book in an upper level hardware design course. The course had a beginning Verilog course as a prerequisite. I hadn't taken that course but I had experience in digital design and VHDL. This book got me up to speed quickly with it's many examples and tight explanations of the Verilog Language.
Some pluses:
-Example designs are short, complete, and simulatable. Most are even synthesizable. This is good because an example can be quickly understood in its entirety. You don't need to flip through and stare and multiple pages to get an idea of what's going on. If you insist on having them, there are two long, practical examples towards the end of the book.
-The text is very well written. Similar in style to 'The C Programming Language by Kernighan and Ritchie.'
-Verilog 2001: Focuses on 2001, which is a little clearer than previous standards. I think all tools support 2001 by default now so that should be used.

Some minuses:
-Too expensive.
-Not enough discussion on how Verilog constructs are compiled and netlisted. This is critically important in FPGA/ASIC design. However, this book is not any worse than other HDL books in this respect. It's just so important, I really haven't seen anything that gives the topic the treatment it deserves.

Possible minus:
-Not really for beginners. This is not a hardware design text.

I haven't used the CD that came with the book so I can't comment on that. My guess is anything on that CD is not as good as industry standard tools like Mentor's ModelSim.
Overall a very impressive book that will get you to productivity quickly in a Verilog project.

Could be great book, but shows too many deficiencies
This book should be used only by the experienced users that can filter out problematic sections.
Major problems:
- first chapter, "recommended" by authors for university courses, is extremely chaotic (begin..end blocks are called loops, exercises ask you to use loops before introducing them, etc.)
- cover of the latest edition claims coverage of the latest Verilog standard - unfortunately it is very poor coverage: new interesting features such as libraries and configurations are not mentioned at all!
- I had to work hard during many trainings to correct bad coding styles showing in students reading this book as their first Verilog publication
- the book is grossly overpriced...

Main advantage:
- good set of examples

Read This First Before Coding in Verilog
The claim that this book has become the standard for learning Verilog is true.
I use Verilog a lot but I still wish I had read this book before writing Verilog codes.

Had to have my own copy
Was sharing this book with my workmate. Found it pretty useful. I think its a great reference book to have.
It has
+ A great Index.
+ Good examples.
+ Been written by the masters of Verilog.
- A lot of words (ie some people might find it very 'wordy')

Every ASIC/FPGA designer I know has this one in there shelf. So go for it.

Do not buy it
I will give it zero star if it is possible. Very bad organized and very expensive. The "Verilog HDL" from SAMIR PLANITKAR is a very goodbook especially for beginners. ... Read more

Book Description
Emphasizing the detailed design of various Verilog projects, Verilog HDL: Digital Design and Modeling offers students a firm foundation on the subject matter. The textbook presents the complete Verilog language by describing different modeling constructs supported by Verilog and by providing numerous design examples and problems in each chapter. Examples include counters of different moduli, half adders, full adders, a carry lookahead adder, array multipliers, different types of Moore and Mealy machines, and much more. The text also contains information on synchronous and asynchronous sequential machines, including pulse-mode asynchronous sequential machines.In addition, it provides descriptions of the design module, the test bench module, the outputs obtained from the simulator, and the waveforms obtained from the simulator illustrating the complete functional operation of the design. Where applicable, a detailed review of the topic's theory is presented together with logic design principles, including state diagrams, Karnaugh maps, equations, and the logic diagram.Verilog HDL: Digital Design and Modeling is a comprehensive, self-contained, and inclusive textbook that carries all designs through to completion, preparing students to thoroughly understand this popular hardware description language. ... Read more

Customer Reviews (2)

Mr. Cavanagh does it again
An excellent book on Verilog HDL.The language is fully covered with a wide variety of examples.The Verilog code corresponds directly to the logic diagrams making the code easy to follow.Especially unique is the complete design of a RISC processor.

Another best-seller by Cavanagh
A great book to learn this popular HDL. Grammatically polished with a numerous examples, this book is ideal for the practicing engineer and students. The theory and detailed design of many different types Moore and Mealy finite-state machines are presented. ... Read more

Book Description
McGraw-Hill Publishing with the cooperation of major EDA vendors has developed the first computer-based training course for the popular Verilog Hardware Description Language.This is a complete training and software package that includes everything that is needed for design with Verilog, from trainings to software and from simulation programs to synthesis tools.The core of this package is the Verilog Computer-Based Training program that is authored and compiled by Dr. Zainalabedin Navabi, an authority in HDLs and EDA tools and environments. In addition to this training program, the course package contains hundred’s of worked examples and templates, language and software tutorials, and simulation and synthesis tools.The Verilog CBT is an interactive training program designed for all skill levels.The material is geared to students in computer and electrical engineering programs or to professional engineers.

Never before, so much tools and training programs have been offered for a fraction of what is usually paid for a 1-day course.

Verilog Computer-Based Training Course:

With the Verilog CBT you can learn Verilog at your own pace with this comprehensive, up-to-date, and powerful CD-ROM training course and save over 90% of the cost of online courses or single-day seminars.Start at the beginning with the development of Verilog code and the application of HDL-based tools in simulation, synthesis, and testing of digital systems--or jump in anywhere if you already know some of the material.This resource-loaded CD will be an indispensable reference for as long as you use Verilog--and for anyone currently working in this rapidly growing HDL.The CD includes synthesizable templates for common RT-level components and has complete Verilog code for interface devices and arithmetic units such as array multipliers, pipeline dividers and polynomials.The topic of test benches and test bench generation is completely covered in this CD.

Verilog Computer-Based Training Course CD-ROM features:
•Everything you need to learn Verilog, in an interactive environment
•Hundreds of worked examples and self-test problems from easy to complex
•Test bench for every example, test bench templates for complex circuits
•License for Mentor’s industry leading Verilog simulation and synthesis tools
•Altera’s complete PLD design tool including simulation and synthesis
•Mentor Graphic’s ModelSim Verilog simulators that run all examples
•Mentor Graphic’s LeonardoSpectrum synthesis tool
•Software tutorials, as well as tutorials for simulation and synthesis
•Quick access to the exact model, template, data, syntax, or grammar you need
•Hard-copy user's manual with detailed study guide
•Supporting web site with answers to all problems and simulations
•Projects at the end of each subject and quizzes at the end of topics

With your purchase you will get tools and programs:

This is more than just a training program.It contains all that a design engineer or a college student needs for learning Verilog and designing with this fastest growing HDL

Here is what is on the training CD:
•Verilog Computer-Based Training software
•Synthesis manuals and guidelines
•Tutorials for use of simulation and synthesis tools that are included on the CD
•Verilog programs and code templates for common designs and testbenches
•Extendable one-year license for Mentor’s ModelSim simulator
•Extendable one-year license for Mentor’s LeonardoSpectrum synthesis tool
•License for Altera’s Quartus II design and PLD programming environment
•Student version of Aldec’s Active HDL design and simulation environment
•Schematic capture and block diagram editors and simulators

Users of Verilog Computer-Based Training Course:

The course is designed for students and professional engineers at all levels.It is designed for each user's pace and skill level, from novice to advanced.The hard-copy user’s manual shows how users with different skill levels can benefit from this course.

Who can use this training CD:
•Those who are new to large scale design and need HDL and design trainings and tools
•Design engineers requiring advanced synthesis and programming skills and Verilog design tools
•Modeling engineers requiring advanced Verilog programming techniques
•Software developers that need all the details of Verilog from timing specification to high-level modeling
•Students in Logic Design who need schematic capture tools and training in Verilog design and programming environments
•Students in Computer Architecture who need training in synthesizable Verilog and use of high-level simulation and synthesis tools
•Students in VLSI and Electronics who require the use of switch level modeling tools and timing simulation tools

Organization of Verilog Computer-Based Training:

The material is organized into different levels, called streams.Each stream targets a particular facet of working with the Verilog language, thereby allowing the user to "jump into" what they are immediately interested in.Streams are divided into flows in which Verilog circuits and coding styles are discussed.

Contents of the Verilog CBT training:
•Verilog in a Top-Down Design Environment, covering steps that are taken in a top-down design of a small processor
•Verilog from Switches to Systems: in a simple to complex fashion, it shows Verilog coding of circuits from switches to systems.It covers complex combinational circuits, sequential blocks, state machines and test benches
•Verilog Language Reference Manual, covers the standard Verilog language and shows point examples
•Verilog Synthesizable Circuit Templates: starts with simple synthesizable codes and describes coding styles for complex combinational and sequential circuit synthesis
•Verilog Formal Syntax Definition: a hyper-linked document shows the formal definition of the IEEE standard Verilog language
•Verilog Based Simulation and Synthesis: step-by-step getting-started tutorials discuss installation and use of all software programs that are included on the CD

Verilog Computer-Based Training Software:

The Verilog CBT software takes advantage of modern multi-media teaching techniques. It uses animations and sound for an effective teaching of a difficult subject. The material is organized and presented with hyperlinked information selection, animation sequences, and different ways of presenting the same information.

Features of the Verilog CBT software:
•Uses animations to illustrate design, simulation and synthesis topics
•Easy to use menus and ample help in each screen
•Search tool for examples and language topics
•Easy access to circuit diagrams, Verilog code, testbench and simulation runs
•Verilog codes of schematic symbols appear as code-tips when selected
•Bookmark tool marks a page or circuit to go back to
•Easy access to the electronic manual
•Step-by-step menu-driven directions form use of simulation and synthesis tools
•Hyperlinked language reference manual and Verilog syntax summary

Circuits:
Array multiplier; Associative memory; Asynchronous control; Bus arbiter; Carry look-ahead adders; Combinational UDPs; Controllers and state machines; Controller testing; Data path testing; Exhaustive testing; External file handling; FIFO queues; Fault tolerant adders; IEEE 1149.1; Iterative circuits; LFSR; LRU; MISR; Memory parts; Pipeline divider; Polynomial calculation; Registers and register files; Sequential UDPs; Shifters and counters; Stacks; System architectures; Switch level logic; Test benches; UART; Wired logic

Constructs:
Always statement; Assign statements; Assign and deassign; Blocking assignment; Case statement; Delay control; Display; Event control; Force and release; Fork and join; Function definition; Hierarchical names; If statement; Intra assignment delay; Memory; Net types; Non-blocking assignment; Parameters; Path delay; PLA modeling; Procedural blocks; Setup and hold check; Specify block; Strength modeling; System tasks; Task declaration; Timing check; Timing control; Trireg; Wait statement ... Read more

Customer Reviews (7)

Verilog Training (PH)
The class was useful for our jr engineer developing a demo system.

Very dissapointing
Since I work for Intel and support the HW and ASIC engineers who design CPLD, FPGAs, ASICs, etc. I decided to purchase this tutorial to get an understanding of the concepts needed for this specific field. I had high hopes for this course especially after reading some of the reviewer's comments.I must say I am deeply dissappointed I paid so much money for a tutorial that is filled with numerous errors.There are so many errors in Streams 2 and 3 that I worry about the other Streams.Streams 2 and 3 are supposed to supply you with the basics, however they are so flawed that many examples contradict themselves.As I stated I am new to this so as I was reading I came across many examples that build on the previous ones that just didn't make sense in terms of how the verilog code was written.I am lucky I work with top-notch ASIC engineers who have been very helpful in answering my questions.Without them I would be so lost in the course contents.These professionals have made known to me their disappointment in a Verilog tutorial that is so prone to inconsistencies and errors.If the basic building blocks to this course are abundant with errors then what does it mean about the rest of the course? As to the other reviewers who gave it 4 or more stars I have just one question for them ---what are you smoking? (because there is no way we can be talking about the same course).If they actually say they learned Verilog based on this course then I would be very wary of their basic understanding of the foundational concepts.In closing the author has not done a good job in reviewing the material content.He stated in his introductory comments his thanks to his team in reviewing the entire course.I pose to all of you that his team failed him miserably.I expect better from individuals who consider themselves experts in this field.

Dissapointing
The licenced tools that come with this cd-rom like leanordo specturm is not supported anymore by model, and also the modelsim.

There is no point in buying this cd-rom at this price only for the tutorial and examples, which you can get them online anyway for free.

I had a real bad experience with the publisher and the author who never replies to emails.

I was very dissapointed after getting this cd-rom and had to return it, still waiting for my money..!!

Grade: C+

Farzin Karimifrom LTX Corporation, San Jose, CA, USA
This is a very well done work. It includes a vast collection ofpractical examples in various fields of digital design, and is a handy and yetrich reference material for both Digital Hardware Engineers and students. The presentation of the material is creative, making the training process more pleasant.
Most importantly, the CD integrates all the necessary design tools in a single platform with the licensingsupports of industrial leading edge EDA vendors.
I believe Dr. Navabiandhis team's effort in providing apromising training package forVerilog lovers at different levels of experience, has been successful.

Great learning tool.
I have learned a lot about Verilog from the time I first received this training material. What made this package successful for me are both the presentation material and the software tools available for hands on practice. First of all, the package comes with simulation and synthesis tools from well-known software manufacturers. You get to install your own choices of simulation tools, and if you are not sure which software to install, there are suggestions from the manual. However, some software do have a one year expiration date and they require a network card. Also, make sure your network card is plugged into the network hub, otherwise, the software could not detect the NIC ID. Other than that, the software installation went smoothly for me and was able to get up to speed in utilizing the software tools with some cursory material which is presented as part of the lesson plan.
The presentation material is didactic and the instructions are easy to follow. There are a plethora of circuits examples, and each circuit example is always accompanied by a logic diagram or block, the Verilog code that describe the logic diagram and the testbench that simulates the end result of the logic diagram described. At the end of every sequence, there will be a project given and it is totally optional to the user whether or not to take up the exercises. The answers to the projects are given and are posted under the author's website. Also, at the end of every stream, there are some short quizzes for further reinforcement to the subject discussed.
Overall, I find this package to be really useful and effective in learning the Verilog design and its unequivocal that Dr. Navabi and his team has done a great job in putting this package together for those of us who are interested in learning the Verilog design language. ... Read more

Customer Reviews (4)

Excellent book
This book very concisely explains how to synthesizable verilog code. A beginner with no idea of HDL concepts might get overwhelmed. I would recommend beginners to start with Verilog HDL by Samir Palnitkar and then move on to this book.

Definitely a must have.

Very vague and broad
I was very excited when I saw this book hoping it'd open me all of the secrets of not-known-until-now world of HDL Synthesis.How wrong I was.The title is very misleading, the book spends just a few pages on synthesis.Overall, this book might be useful for a novice, but even for me, an undergrad ECE major, it turned out to be almost useless.It contains minimum of factual information, often outdated(and this is critical in the ECE world), and only slightly touches the surface on a number of topics it tries to cover.I think the authors whould have concentrated on something specific, instead of giving "what happened in Computer Engineering in last 15 years" review.

Excellent Treatment of Verilog and PLD Methodology
I have been a user of VHDL for the last three years and am now beginning to use Verilog, mostly because I am now doing ASIC development. For the new Verilog user, this book isexcellent because it covers the gamut for an HDL and FPGA designer -- the syntax of the language,the differencebetween structural and behavioral constructs, simulation, hierarchical design, and of course the ubiqituous State Machine. Also included are some sections on targeting different types oftechnology, including standard cell. I found this book quite useful compared to other Verilog books I have purchased.

One of the Best Verilog books to learn from
I have been searching for an Verilog book that will allow me to get up to speed quickly for an particular project. I wanted something that presentedthe syntax of the language in an clear manner but more importantly wouldgive me an methodology to allow me to use Verilog in the design of an FPGA.This book seems to have "the right stuff". This book along with"Verilog HDL" by Samir Palnitkar seem to be the best that I haveseen for learning Verilog ... Read more

Book Description
Verilog® Quickstart is a basic, practical,introductory textbook for professionals and students alike. This bookexplains how a designer can be more effective through the use of theVerilog hardware description language to simulate and document adesign.
By understanding simulation, a designer can simulate a design to seeif a design works before it is built. This gives the designer anopportunity to try different ideas. Documentation allows a designer tomaintain and reuse a design more easily. Verilog's intrinsichierarchical modularity enables the designer to easily reuse portionsof the design as `intellectual property' or `macro-cells'.
Verilog® Quickstart presents some of the formal Verilogsyntax and definitions and then shows practical uses. This book doesnot oversimplify the Verilog language nor does it emphasize theory.
Verilog® Quickstart has over 100 examples that are used toillustrate aspects of the language. In the later chapters the focus ison working with modeling style and explaining why and when one woulduse different elements of the language. Another feature of the book isthe chapter on state machine modeling. There is also a chapter on testbenches and testing strategy as well as a chapter on debugging.
Verilog® Quickstart is designed to teach the Veriloglanguage, to show the designer how to model in Verilog and to explainthe basics of using Verilog simulators. ... Read more

Customer Reviews (4)

easy transition to verilog, good reference book
I have a VHDL background and this book was recommended to me. It made a smoooth transition into verilog. I read the book globally and then kept the book as a reference on my desk. If I needed something specific like file I/O and generating vectors, I used the example as a template to complete my verification. Also it helped to organize my files, like having one verification environment and easily plugging in tests by use of common tasks. Currently I am using Verilog and System Verilog, this book is still used regularly.

Save your money
This is a typical Verilog book, which isn't saying much. The examples tend to be contrived and mostly show how *not* to write good Verilog code - by the author's own admission! You won't find a decent example of how to model a flip flop until pg. 144, in the chapter "Advanced Procedural Modeling." If you really want this book anyway, buy it used and keep it for reference.After all, in the introduction the book says "Some of the information you want might be outside the scope of this book. Some of the other sources are simulator reference manuals; and the comp.lang.verilog usenet news group." (sic)

You could also try "HDL Chip Design" by Smith since it covers Verilog and VHDL.At least it shows good style and thoroughly explains what each line of code is doing and shows synthesis results with small schematics.

Very good book for beginer
I was lucky to have James Lee class at ucsc/ca. This book will
be very useful for all reader from beginer to practical expert.

Verilog testbench reference
The book provides a good resource for those designers that already know Verilog and wish to have coding tips for simulation testbenches.

It is learn-by-example format, and is updated to include the '99 verilog standard. The book is well laid out, meaning that from the index it is easy to find a relevant coding example.

I also bought "A designers guide to VHDL" Peter J. Ashendon which is a language reference for VHDL by example. ... Read more

Book Description
This rigorous text shows electronics designers and students how to deploy Verilog in sophisticated digital systems design.The Second Edition is completely updated -- along with the many worked examples -- for Verilog 2001, new synthesis standards and coverage of the new OVI verification library.
... Read more

Customer Reviews (20)

learn testbenching!
Verilog is probably the most common package for modelling digital circuits. Navabi provides detailed instructions on how to use it for many types of circuits. We see how Verilog can provide different levels of modelling. From the Register Transfer Level to doing higher level synthesis. This lets you simulate either a small circuit, to great depth, or to scale to much larger sets of transistors.

The testbenching ability of Verilog is emphasised. Vital in checking the validity of performance of your circuits, before you tape out to silicon. One of Verilog's strengths is how its testbenching can save you time and money. Provided you take full advantage of it.

Excellent Book for Beginners
This is an excellent book for beginners. I especially like how the examples are organized. It starts with the basic ones and ends with a complete working CPU. The later examples use the earlier ones as basic modules, which is very helpful for beginners.

The materials included in the CD are very useful with the exception of the software, which is outdated now. Hope the latest software will be included in the CD with the new edition of the book.

Very good learning materials
This book contains many useful examples of real design applications with various coding styles. It is a very good reference for the students who start to learn Verilog for the first time. It describes from structural to behavioral level design with emphasis on synthesizable codes. Students can learn not only the verilog language itself but also the hardware system design concepts and flow. The CPU design chapter is a very excellent example of showing how to approach a complex design task step by step.

Graduate Student
I have used this book in my graduate level course. As a intermediate level person, I have found this book very useful to understand the design process, simulation, synthesis and etc. I would strongly recommend this book for both beginners and intermediate level programmers, as concept of HDL is written clearly in an understandable way.A person who is interested in the Digital Circuit Design would find an excellent flow between each chapters, and informations in each chapters are described very well. On the other hand, I found that the book is kind of outdated, and someone who wants to use this book as a Reference Book may not find it useful.

OK for beginners, but not as a reference.
This book does an OK job in explaining the language for a beginner.However, it falls short with the details of the language.I had accidentally left the book at the school, right after the exam, and didn't go back to pick it up (even though I was only a block away).If I end up needing a book, I will try to find a better reference book. ... Read more

Customer Reviews (10)

Good Book
This book is not the a quick start verilog book. It is a comprehensive verilog bible kind of a book and hence a good reference. There are explanations for everything from syntax, usage, to pitfalls and subtleties. If you are going to buy only one book and intend to learn verilog seriously I would recommend this book. If you are just tinkering with verilog however and want to experiment only for a while, you should consider one of the "learn verilog in 24 hours" or quick start verilog books.

Text for grad engineering class
First printing has some different problem numbers from other printings.Check the printing number against class requirements.

Recommended.
I am using this book for an introductory Verilog class at my University and I must say I am truely confused by some of the reviews here. Although this book takes the reader through the most basic elements of the Verilog language, to its more complex and esoteric uses, most people here complain that the it fails to provide the advanced, cutting-edge examples they feel it should have. What? Do you really expect to learn how to build a Pentium IV from a book teaching the basics of Verilog? Get real!

This book teaches the basics, it teaches you how to use the Verilog language by providing examples that, although dated, illustrate timeless approaches that are used in every Verilog design large or small. If you can't find how to complement a variable, then its your fault, not the book; I can assure you its there. Furthermore, if you think that pointing out a few mistakes in the book, (and have obviously learnt the correct way of doing it from it), makes it rubbish, then I'm afraid there won't be any books that will fully satisfy your needs.

This is one of the best books I've encountered on the Verilog langauge. Although I wouldn't say it's as good as, say, Ashendens VHDL, it is _not_ as bad as some of the reviews here make out. Recommended!

Writing is far from refined
The writing is fragmented and incomplete statements are often seen, for example:

1. in section 4.6.4, it is written
"If A and B are vectors, A&&B returns true if both words are
positive integers." then no words there to specify "otherwise" part. If you assume otherwise A&&B returns false, you are wrong,
since A&&B returns true when both are negative integers too.

2. In 7.5.1, it says "There are two forms for delay control,...
The first form is ...", but the second form is never explained or mentioned there.

3. You often see
always @ ( a or b ) in examples with "or" in boldface,
but I could not find where "or" is defined. Even though I
understand its meaning, I wish to tell the differece from
using "|" , "||"

4. ... plus many typos

These cause a lot confusion in reading

One of the best
This book is one best to learn Verilog with. Each chapter starts with an statement of the chapters objectives, then covers the topic with many examples and finally summarizes the chapter at the end. There are an series of questions at the end of each chapter that help to solidify the concepts within each chapter. (but no answers in the book). All in all I think that this is the best overall presentation of Verilog that I have read yet. Samir Palnitar's Verilog HDL is slower paced and thus better for the novice (I read this one first). This book is slightly more advanced and seems to take you further. ... Read more

Book Description
Provides a practical approach to Verilog design and problem solving.
* Bulk of the book deals with practical design problems that design engineers solve on a daily basis.
* Includes over 90 design examples.
* There are 3 full scale design examples that include specification, architectural definition, micro-architectural definition, RTL coding, testbench coding and verification.
* Book is suitable for use as a textbook in EE departments that have VLSI courses ... Read more

Customer Reviews (3)

Sparse Index
This is a 309-page book with a one and a half page index! I can't count how many times I have pulled out this book, looked for a particular topic in its index, and put the book back on the shelf.

Not obvious from the title, although Lee says so on the back cover, this book describes a design flow for ASIC design. That makes me wonder if there exists a Verilog book that describes a design flow for microprocessor design.

A reasonable introduction to Verilog is provided on the CD accompanying "Computer Organization and Design: The Hardware/Software Interface", Third Edition. [...]

For an HDL-independent explanation of register-transfer-level (RTL) and behavioral modeling, I really like Figure 1-1 in "The Designer's Guide to VHDL" and its accompanying text, although Peter Ashendon gives credit to Gajski and Kuhn ("New VLSI Tools", IEEE Computer, Vol. 16, No. 12, December 1983, pp. 11-14) for devising the figure. Lee's book, like so many others, doesn't do a good job on these concepts.

Of course, there is no substitute for IEEE Std 1364-2001 (and IEEE Std 1364.1-2002 defining the RTL subset).

Great reference for synthesizable verilog
This book is an excellent reference for writing synthesizable verilog. Chapter 4 (Best Known Methods for Synthesis) gives useful example and explaination on this matter.Such knowledge is usually only attainable through experience.

I find this book very useful, and would highly recommend it to students and new designers (even experienced designers too!). It will definitely help them in coding synthesizable verilog for tape-out!

No use !
Don't buy this book! Its useless, neither for beginners norfor advanced people(anyway). I went thru this book in couple of hours, found ridiciolous simple mistakes in it, Book has "for Syntheis" in its name but found so many rubbish pages full with some stupid simulation results. Well, one can find better docs on the Net just for free, instead of buying this book. ... Read more

Customer Reviews (3)

What a waste!
Just received my copy. There's no inclusion of the additional commands in file I/O from Verilog 2001. There's no $fscanf, no $fgets. No always @(*) explanation. If you're looking for Verilog 2001 stuff, look elsewhere.

Excellent introduction and reference
I purchased this with the hope of reinforcing my existing Verilog knowledge as well as familiarizing myself with new language features added in Verilog 2001.

What I found in the book was a fairly well-written, concise, introduction to the language. Furthermore, Verilog 2001 features were mentioned as appropriate. The examples are diverse and exhaustive, making this a perfect reference guide for people who learn best by example. Also, appendices provide invaluable reference materials for language features and primitives. Finally, Prof. Ciletti does an excellent job of mentioning practical synthesis considerations in designs, as well as suggesting coding styles as opposed to mandating a specific style.

I feel this book is an excellent value for the price, and I've placed in my reference bookshelf for digital design.

an excellent introduction to verilog
I liken this book to Kernighan and Ritchie's "The C Programming Language" in that it seems very concise, self-contained, well-written, with helpful appendices that will answer most advanced questions about verilog. The comparison is fitting since verilog is based on the C language. The aforementioned book on C is really the only text reference on the subject that I've used in the past five years, and I imagine verilog 2001 will play a similar role as I continue using verilog to design hardware. ... Read more

Customer Reviews (6)

ASM and Verilog is a bad mix.
The author obviously is trying to force Verilog and ASM notation into the same book. The result is the implicit use of Verilog states which in effect results in unmanagable Verilog spaghetti code. Having a background in both hardware design and software consulting the Verilog code in the book is terrible. It can be compared to a jumble of assembly language without any comments of structure - sure, if you know the background of the design (i.e. the ASM charts) you might see why the code might work but the Verilog code by itself is not readable!

If you do some research you'll quickly see that ASM charts are not widely used these days. Most engineers in the industry are using well defined moore state machines because they are easy to understand and maps very well to case statements in Verilog.

I will now skim through the rest of the book to see if there might be some content NOT related to ASM charts that might be worth picking up...

Gets you off to a running start
I got this book as a quick tutorial on the Verilog language. After just a day or two with this book and a compiler to play with, I had the level of skill that I wanted. The Verilog language description is just one chapter in this book, though, and not even the longest one.

This is lots more than just a language book. It also shows a higher level of design than most students see in their first few logic courses. The example developed in the book's later sections works up to a supersclar ARM processor core! This book is not about hooking up a few gates and latches. It actually starts to address problems of practical size and complexity. Big problems really are different from small ones, and I was very happy to see techniques for the larger systems.

That said, beginning logic designers may find the book frustrating. It works at a high conceptual level and fast pace. The author assumes that the reader already has good command of the basics of boolean logic, synchronous design, and computer architecture.

Initially, I just wanted a competent language description. I got that, plus some worthwhile design technique. Best of all, I did not have to sit through yet another lesson in the baby steps of logic design.

enlightening!
this book is an insightful and exciting introduction to hardware
design, especially to those like me with a software background.
the author illuminates the difference between hardware and
software specification, and demonstrates how his "implicit"
(RTL) approach works well for (synthesis of) pipelined CPU designs.
the only deficit is that some of the free tools listed in the
appendix are no longer available.

Not a great first book on Verilog
Although the book does cover most of the basics in Verilog, its terrible organization of Verilog topics renders the book almost useless as a good reference to the Verilog language. Stick with Palnitkar's book for this purpose. As far as I have seen the author's implicit style of Verilog code is not recommended in the industry, nor could I find any compelling reason why it should be. The author's use of ASMs is very good and a useful tool when mastered. The information regarding computer design is solid but having a copy of the classics by Hennessy and Patterson nearby is always useful. I would recommend this book to the Verilog designer that is interested in computer design but not as a first book on either topic.

Not a good first Verilog book.
Although the book does cover most of the basics in Verilog, its terrible organization of Verilog topics renders the book almost useless as a good reference to the Verilog language.Stick with Palnitkar's book for this purpose. As far as I have seen the author's implicit style of Verilog code is not recommended in the industry, nor could I find any compelling reason why it should be. The author's use of ASMs is very good and a useful tool when mastered. The information regarding computer design is solid but having a copy of the classics by Hennessy and Patterson nearby is always useful. I would recommend this book to the Verilog designer that is interested in computer design but not as a first book on either topic. ... Read more

Book Description
Analog Behavioral Modeling With The Verilog-A Languageprovides the IC designer with an introduction to the methodologies anduses of analog behavioral modeling with the Verilog-A language. Indoing so, an overview of Verilog-A language constructs as well asapplications using the language are presented. In addition, the bookis accompanied by the Verilog-A Explorer IDE (Integrated DevelopmentEnvironment), a limited capability Verilog-A enhanced SPICE simulatorfor further learning and experimentation with the Verilog-A language.This book assumes a basic level of understanding of the usage ofSPICE-based analog simulation and the Verilog HDL language, althoughany programming language background and a little determination shouldsuffice.
From the Foreword:
`Verilog-A is a new hardware design language (HDL) for analogcircuit and systems design. Since the mid-eighties, Verilog HDL hasbeen used extensively in the design and verification of digitalsystems. However, there have been no analogous high-level languagesavailable for analog and mixed-signal circuits and systems.
Verilog-A provides a new dimension of design and simulation capabilityfor analog electronic systems. Previously, analog simulation has beenbased upon the SPICE circuit simulator or some derivative of it.Digital simulation is primarily performed with a hardware descriptionlanguage such as Verilog, which is popular since it is easy to learnand use. Making Verilog more worthwhile is the fact that several toolsexist in the industry that complement and extend Verilog'scapabilities ...
Behavioral Modeling With the Verilog-A Language provides a goodintroduction and starting place for students and practicing engineerswith interest in understanding this new level of simulationtechnology. This book contains numerous examples that enhance the textmaterial and provide a helpful learning tool for the reader. The textand the simulation program included can be used for individual studyor in a classroom environment ...'
Dr. Thomas A. DeMassa, Professor of Engineering, Arizona StateUniversity ... Read more

Customer Reviews (3)

Riddled with errors
This book definately need an editor. Many of the examples,even the basic examples are riddled with errors. It is an ok read but don't expect to be a novice after reading this book.

followup on prior review
the book introduces the methodology to analog behavioral modeling - starting with basics andthen introducing complex examples (in the biggest chapter).the examples include an opamp and characterization of it.maybethe other reviewer did not get that far.a valid drawback is that the mostrecent specification for Verilog-A/Verilog-AMS has changed sincepublication (most constructs are still valid though).

It provides little information about Verilog-A
This book is the only one that I can find in the bookshelf discuss Verilog-A language. I expect it can provide some examples to model a real world analog circuit using Verilog-A language, but I am disappointedbecause this book provides only simple description about resistors,capacitors, etc. You can't even find how to model an opamp in this book. ... Read more

Book Description
This book organizes Verilog routines according to functionality, making it easy to locate the material you need. Each function is described by a behavioral model to use for simulation, followed by the RTL code you'll use to synthesize the gate-level implementation. Extensive test code is included for each function, to assist you with your own verification efforts. The CD-ROM includes all of the Verilog code from the book, plus FPGA Express synthesis software from Synopsys and SILOS III simulation software from Simucad. ... Read more

Customer Reviews (15)

Excellent resource for designers.
The book covers synthesis and design issues with clarity and concise explanations for each case.There isn't any extra fluff to get in the way of going from concept-to-synthesis for each topic presented.

Excellent book on verilog
Bob's "Verilog Designer's Library" is an excellent book for
verilog programmers. It does help me much.Every example in
this book is very practical to engineers. I like it.

Some Good Points
This book is good for beginners, it has a few good ideas in it.The Behavioral vs. RTL versions of the code is pretty useless, but the RTL vs. Simulation versions are useful.Getting a quick and dirty unit test bench up and running is a good idea.But DO NOT USE THE ASYNCHRONOUS FIFO.It does not work.If you are crossing clock boundaries, this is not the way to do it!

The reviews about Verilog Designer's Library
This bookreviews the the Verilog Coding Technique in part one. It introduces the Genearl Coding, Behavioral Coding, and RTL coding technique. It makes reader understand how important the coding technique is. This book also explains synthesis issue and simulation issue. After these chapters introduction, the basic building block, state machines, some complex functions, error dection and correction, memory controller Verilog behaviour code and RTL code are introduced in further chapter. This book is for whom has a basic familiarity with Verilog language. It is very useful and valuable for hardware designer,hardwaresystem engineer and student.

Handy Library, Cut and Paste
The book has gone through the very details of logic synthesis. With a rich and usable set of design ideas that can be used in any design with minimal modifications. Save time in your design while you learn. ... Read more

Book Description
Using Verilog, a leading commercial hardware description language, this text describes how to specify, design, and test a complete digital system. After a brief introduction to the Verilog language, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined. The remainder of the book demonstrates how both behavioral and structural models can be developed and intermingled in Verilog. ... Read more

Customer Reviews (2)

do not waste your money
The author claims that he covered in this book what other test books failed to do. He claims that this book can be used to design a processor from start to finish. Unfortunately I bought this book and was hoping to find a detailed explanation on how to design a mini processor.After reviewing the book, I concluded that this book is a waste of money and time. For example, the book talks too much about verilog basics but did not provide a block diagram or a top level for the VeSPA processor which is used in the book. For the money I paid I was expecting to find a useful example of a mini processor design.

Too incomplete.
Unfortunately, this book is more of an overview book. Don't expect to get any of the subjects presented fully explained. Some of the really important topics (like hazard detection) are only briefly mentioned. For the price it should have been at least twice as big and much more detailed. ... Read more